The integrated circuit (IC) design and manufacturing is more challenging when semiconductor technologies are continually progressing to smaller feature sizes, such as 45 nanometers (nm), 28 nm, and below. For example, photolithography is used for transferring design patterns to wafers. Imaging inaccuracy of photolithography at smaller process nodes has resulted in unsatisfactory pattern transfer. For example, rounded corners on a device feature that is designed to have right-angle corners may become more pronounced or more critical in the smaller nodes, preventing the device from performing as desired. Other examples of inaccurate or poorly shaped device features include pinching, necking, bridging, dishing, erosion, metal line thickness variations, and other characteristics that affect device performance.
Typically, optical proximity correction (OPC) may be performed on a design pattern to help alleviate some of these difficulties before the design pattern is used in later operations in an IC manufacturing process, such as an operation creating a mask or a photolithography process exposing wafers. OPC may modify shapes of the design pattern and/or insert assist features (AF) based on simulated IC manufacturing processes.
However, along with the progress of the lithography patterning, some other imaging effects are unavoidable and those imaging effects are related to the location of the patterns on a mask or an imaging tool. For 28 nm process nodes and below, the severity of main feature distortion caused by those location effects has become unacceptable in terms of device performance, quality and reliability. Therefore, it is desirable to correct patterns to address those imaging effects effectively and efficiently.